Archimago's Musings: MEASUREMENTS: Computer USB port noise, USB hubs and the 8kHz PHY Microframe Packet Noise
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Physical layer - Wikipedia
Chip controls up to seven USB-C ports, and Power Delivery
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Mixed-Signal Verification for USB 2.0 Physical Layer IP
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High Speed Inter-CHIP USB 2.0 PHY | Arasan Chip Systems
USB-IF certified solutions for USB type-C and Power Delivery - STMicroelectronics
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USB 3.0 PHY for SoC Designs | Cadence IP
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MB86C311A TQFP-64 chip with hardware AES USB 3.0 PHY (Device) USB 3.0 IC | eBay
TUSB1210-Q1 data sheet, product information and support | TI.com
Soft Mixed Signal Corporation USB 2.0 PHY IP Cores
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Physical layer - Wikiwand
ASMedia Demos USB 3.2 Gen 2x2 PHY, USB 3.2 Controller Due in 2019
USB 2.0 Device Controller IP Core (USB20SF)
XR2280x Hi-Speed USB to 10/100 Ethernet Bridge ICs - MaxLinear | Mouser
USB 2.0 PHY IP core | Arasan Chip Systems
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